§ Устройство

Device Model: 5CEBA4F23C7
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§ makefile

1all: pgm
2pgm:
3	quartus_pgm -m jtag -o "p;output_files/de0.sof"
4syn:
5	quartus_map --read_settings_files=on  --write_settings_files=off de0 -c de0
6	quartus_fit --read_settings_files=off --write_settings_files=off de0 -c de0
7	quartus_asm --read_settings_files=on  --write_settings_files=off de0 -c de0
8cdb:
9	quartus_cdb de0 -c de0 --update_mif
10	quartus_asm --read_settings_files=on --write_settings_files=off de0 -c de0
11sta:
12	quartus_sta de0 -c de0
13clean:
14	rm -rf db incremental_db simulation timing greybox_tmp *.jdi *.pof *.sld *.rpt *.summary *.sof *.done *.pin *.bak *.smsg *.qws *.vcd
15	rm -rf *.gtkw *.qqq *.jic *.map .qsys_editundo_redo.txt PLLJ_PLLSPE_INFO.txt c5_pin_model_dump.txt output_files obj_dir *.o *.elf *.lst

§ de0.v

Это главный файл, включает в себя модуль PLL.

1module de0(
2
3      /* Reset */
4      input              RESET_N,
5
6      /* Clocks */
7      input              CLOCK_50,
8      input              CLOCK2_50,
9      input              CLOCK3_50,
10      inout              CLOCK4_50,
11
12      /* DRAM */
13      output             DRAM_CKE,
14      output             DRAM_CLK,
15      output      [1:0]  DRAM_BA,
16      output      [12:0] DRAM_ADDR,
17      inout       [15:0] DRAM_DQ,
18      output             DRAM_CAS_N,
19      output             DRAM_RAS_N,
20      output             DRAM_WE_N,
21      output             DRAM_CS_N,
22      output             DRAM_LDQM,
23      output             DRAM_UDQM,
24
25      /* GPIO */
26      inout       [35:0] GPIO_0,
27      inout       [35:0] GPIO_1,
28
29      /* 7-Segment LED */
30      output      [6:0]  HEX0,
31      output      [6:0]  HEX1,
32      output      [6:0]  HEX2,
33      output      [6:0]  HEX3,
34      output      [6:0]  HEX4,
35      output      [6:0]  HEX5,
36
37      /* Keys */
38      input       [3:0]  KEY,
39
40      /* LED */
41      output      [9:0]  LEDR,
42
43      /* PS/2 */
44      inout              PS2_CLK,
45      inout              PS2_DAT,
46      inout              PS2_CLK2,
47      inout              PS2_DAT2,
48
49      /* SD-Card */
50      output             SD_CLK,
51      inout              SD_CMD,
52      inout       [3:0]  SD_DATA,
53
54      /* Switch */
55      input       [9:0]  SW,
56
57      /* VGA */
58      output      [3:0]  VGA_R,
59      output      [3:0]  VGA_G,
60      output      [3:0]  VGA_B,
61      output             VGA_HS,
62      output             VGA_VS
63);
64
65// Z-state
66assign DRAM_DQ = 16'hzzzz;
67assign GPIO_0  = 36'hzzzzzzzz;
68assign GPIO_1  = 36'hzzzzzzzz;
69
70// LED OFF
71assign HEX0 = 7'b1111111;
72assign HEX1 = 7'b1111111;
73assign HEX2 = 7'b1111111;
74assign HEX3 = 7'b1111111;
75assign HEX4 = 7'b1111111;
76assign HEX5 = 7'b1111111;
77
78// ---------------------------------------------------------------------
79wire clock_25;  wire clock_50;  wire clock_75;
80wire clock_100; wire clock_106;
81
82pll u0(
83
84    // Источник тактирования
85    .clkin (CLOCK_50),
86
87    // Производные частоты
88    .m25   (clock_25),
89    .m50   (clock_50),
90    .m75   (clock_75),
91    .m100  (clock_100),
92    .m106  (clock_106),
93);
94// -----------------------------------------------------------------------
95
96endmodule
97
98// *********************************************************************
99// Модуль PLL
100// *********************************************************************
101
102module  pll(
103
104	input wire clkin,
105	input wire rst,
106
107	output wire m25,
108	output wire m50,
109	output wire m75,
110	output wire m100,
111	output wire m106,
112
113	output wire locked
114);
115
116altera_pll #(
117    .fractional_vco_multiplier("false"),
118    .reference_clock_frequency("50.0 MHz"),
119    .operation_mode("normal"),
120    .number_of_clocks(5),
121    .output_clock_frequency0("25.0 MHz"),
122    .phase_shift0("0 ps"),
123    .duty_cycle0(50),
124    .output_clock_frequency1("100.0 MHz"),
125    .phase_shift1("0 ps"),
126    .duty_cycle1(50),
127    .output_clock_frequency2("50 MHz"),
128    .phase_shift2("0 ps"),
129    .duty_cycle2(50),
130    .output_clock_frequency3("106 MHz"),
131    .phase_shift3("0 ps"),
132    .duty_cycle3(50),
133    .output_clock_frequency4("75 MHz"),
134    .phase_shift4("0 ps"),
135    .duty_cycle4(50),
136    .output_clock_frequency5("0 MHz"),
137    .phase_shift5("0 ps"),
138    .duty_cycle5(50),
139    .output_clock_frequency6("0 MHz"),
140    .phase_shift6("0 ps"),
141    .duty_cycle6(50),
142    .output_clock_frequency7("0 MHz"),
143    .phase_shift7("0 ps"),
144    .duty_cycle7(50),
145    .output_clock_frequency8("0 MHz"),
146    .phase_shift8("0 ps"),
147    .duty_cycle8(50),
148    .output_clock_frequency9("0 MHz"),
149    .phase_shift9("0 ps"),
150    .duty_cycle9(50),
151    .output_clock_frequency10("0 MHz"),
152    .phase_shift10("0 ps"),
153    .duty_cycle10(50),
154    .output_clock_frequency11("0 MHz"),
155    .phase_shift11("0 ps"),
156    .duty_cycle11(50),
157    .output_clock_frequency12("0 MHz"),
158    .phase_shift12("0 ps"),
159    .duty_cycle12(50),
160    .output_clock_frequency13("0 MHz"),
161    .phase_shift13("0 ps"),
162    .duty_cycle13(50),
163    .output_clock_frequency14("0 MHz"),
164    .phase_shift14("0 ps"),
165    .duty_cycle14(50),
166    .output_clock_frequency15("0 MHz"),
167    .phase_shift15("0 ps"),
168    .duty_cycle15(50),
169    .output_clock_frequency16("0 MHz"),
170    .phase_shift16("0 ps"),
171    .duty_cycle16(50),
172    .output_clock_frequency17("0 MHz"),
173    .phase_shift17("0 ps"),
174    .duty_cycle17(50),
175    .pll_type("General"),
176    .pll_subtype("General")
177)
178altera_pll_i (
179    .rst	(rst),
180    .outclk	({m75, m106, m50, m100, m25}),
181    .locked	(locked),
182    .fboutclk ( ),
183    .fbclk	(1'b0),
184    .refclk	(clkin)
185);
186
187endmodule

§ de0.qpf

1DATE = "Mon May  5 11:54:18 2014"
2QUARTUS_VERSION = "13"
3
4# Revisions
5PROJECT_REVISION = "de0"

§ de0.qsf

1#============================================================
2# Build by Terasic V1.0.0
3#============================================================
4
5set_global_assignment -name FAMILY "Cyclone V"
6set_global_assignment -name DEVICE 5CEBA4F23C7
7set_global_assignment -name TOP_LEVEL_ENTITY "de0"
8set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13
9set_global_assignment -name LAST_QUARTUS_VERSION 15.1.0
10set_global_assignment -name PROJECT_CREATION_TIME_DATE "MON MAY  5 11:54:18 2014"
11set_global_assignment -name NUM_PARALLEL_PROCESSORS 16
12set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
13
14#============================================================
15# CLOCK2
16#============================================================
17set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK2_50
18
19#============================================================
20# CLOCK3
21#============================================================
22set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK3_50
23
24#============================================================
25# CLOCK4
26#============================================================
27set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK4_50
28
29#============================================================
30# CLOCK
31#============================================================
32set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
33
34#============================================================
35# DRAM
36#============================================================
37set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0]
38set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1]
39set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2]
40set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3]
41set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4]
42set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5]
43set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6]
44set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7]
45set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8]
46set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9]
47set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10]
48set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
49set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
50set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
51set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1]
52set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N
53set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE
54set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK
55set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N
56set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0]
57set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1]
58set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2]
59set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3]
60set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4]
61set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5]
62set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6]
63set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7]
64set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8]
65set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9]
66set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10]
67set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11]
68set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12]
69set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13]
70set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14]
71set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15]
72set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_LDQM
73set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N
74set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_UDQM
75set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N
76
77#============================================================
78# GPIO
79#============================================================
80set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[0]
81set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[1]
82set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[2]
83set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[3]
84set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[4]
85set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[5]
86set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[6]
87set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[7]
88set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[8]
89set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[9]
90set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[10]
91set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[11]
92set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[12]
93set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[13]
94set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[14]
95set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[15]
96set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[16]
97set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[17]
98set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[18]
99set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[19]
100set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[20]
101set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[21]
102set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[22]
103set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[23]
104set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[24]
105set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[25]
106set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[26]
107set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[27]
108set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[28]
109set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[29]
110set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[30]
111set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[31]
112set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[32]
113set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[33]
114set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[34]
115set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_0[35]
116set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
117set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
118set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
119set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
120set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
121set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
122set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[6]
123set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[7]
124set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[8]
125set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[9]
126set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[10]
127set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[11]
128set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[12]
129set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[13]
130set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[14]
131set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[15]
132set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[16]
133set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[17]
134set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[18]
135set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[19]
136set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[20]
137set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[21]
138set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[22]
139set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[23]
140set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[24]
141set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[25]
142set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[26]
143set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[27]
144set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[28]
145set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[29]
146set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[30]
147set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[31]
148set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[32]
149set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[33]
150set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[34]
151set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[35]
152
153#============================================================
154# HEX
155#============================================================
156set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[0]
157set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[1]
158set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[2]
159set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[3]
160set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[4]
161set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[5]
162set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[6]
163
164#============================================================
165# HEX1
166#============================================================
167set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[0]
168set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[1]
169set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[2]
170set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[3]
171set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[4]
172set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[5]
173set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[6]
174
175#============================================================
176# HEX2
177#============================================================
178set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[0]
179set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[1]
180set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[2]
181set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[3]
182set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[4]
183set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[5]
184set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[6]
185
186#============================================================
187# HEX3
188#============================================================
189set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[0]
190set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[1]
191set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[2]
192set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[3]
193set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[4]
194set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[5]
195set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[6]
196
197#============================================================
198# HEX4
199#============================================================
200set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[0]
201set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[1]
202set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[2]
203set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[3]
204set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[4]
205set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[5]
206set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[6]
207
208#============================================================
209# HEX5
210#============================================================
211set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[0]
212set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[1]
213set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[2]
214set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[3]
215set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[4]
216set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[5]
217set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[6]
218
219#============================================================
220# KEY
221#============================================================
222set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
223set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
224set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[2]
225set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[3]
226
227#============================================================
228# LEDR
229#============================================================
230set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[0]
231set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[1]
232set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[2]
233set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[3]
234set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[4]
235set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[5]
236set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[6]
237set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[7]
238set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[8]
239set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[9]
240
241#============================================================
242# PS2
243#============================================================
244set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK
245set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_CLK2
246set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT
247set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PS2_DAT2
248
249#============================================================
250# RESET
251#============================================================
252set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to RESET_N
253
254#============================================================
255# SD
256#============================================================
257set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_CLK
258set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_CMD
259set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DATA[0]
260set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DATA[1]
261set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DATA[2]
262set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SD_DATA[3]
263
264#============================================================
265# SW
266#============================================================
267set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
268set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
269set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
270set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
271set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[4]
272set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[5]
273set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[6]
274set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[7]
275set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[8]
276set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[9]
277
278#============================================================
279# VGA
280#============================================================
281set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0]
282set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1]
283set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2]
284set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3]
285set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0]
286set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1]
287set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2]
288set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3]
289set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS
290set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0]
291set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1]
292set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2]
293set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3]
294set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS
295
296#============================================================
297# End of pin assignments by Terasic System Builder
298#============================================================
299
300set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
301set_location_assignment PIN_H13 -to CLOCK2_50
302set_location_assignment PIN_E10 -to CLOCK3_50
303set_location_assignment PIN_V15 -to CLOCK4_50
304set_location_assignment PIN_M9 -to CLOCK_50
305set_location_assignment PIN_W8 -to DRAM_ADDR[0]
306set_location_assignment PIN_T8 -to DRAM_ADDR[1]
307set_location_assignment PIN_U11 -to DRAM_ADDR[2]
308set_location_assignment PIN_Y10 -to DRAM_ADDR[3]
309set_location_assignment PIN_N6 -to DRAM_ADDR[4]
310set_location_assignment PIN_AB10 -to DRAM_ADDR[5]
311set_location_assignment PIN_P12 -to DRAM_ADDR[6]
312set_location_assignment PIN_P7 -to DRAM_ADDR[7]
313set_location_assignment PIN_P8 -to DRAM_ADDR[8]
314set_location_assignment PIN_R5 -to DRAM_ADDR[9]
315set_location_assignment PIN_U8 -to DRAM_ADDR[10]
316set_location_assignment PIN_P6 -to DRAM_ADDR[11]
317set_location_assignment PIN_R7 -to DRAM_ADDR[12]
318set_location_assignment PIN_T7 -to DRAM_BA[0]
319set_location_assignment PIN_AB7 -to DRAM_BA[1]
320set_location_assignment PIN_V6 -to DRAM_CAS_N
321set_location_assignment PIN_R6 -to DRAM_CKE
322set_location_assignment PIN_AB11 -to DRAM_CLK
323set_location_assignment PIN_U6 -to DRAM_CS_N
324set_location_assignment PIN_Y9 -to DRAM_DQ[0]
325set_location_assignment PIN_T10 -to DRAM_DQ[1]
326set_location_assignment PIN_R9 -to DRAM_DQ[2]
327set_location_assignment PIN_Y11 -to DRAM_DQ[3]
328set_location_assignment PIN_R10 -to DRAM_DQ[4]
329set_location_assignment PIN_R11 -to DRAM_DQ[5]
330set_location_assignment PIN_R12 -to DRAM_DQ[6]
331set_location_assignment PIN_AA12 -to DRAM_DQ[7]
332set_location_assignment PIN_AA9 -to DRAM_DQ[8]
333set_location_assignment PIN_AB8 -to DRAM_DQ[9]
334set_location_assignment PIN_AA8 -to DRAM_DQ[10]
335set_location_assignment PIN_AA7 -to DRAM_DQ[11]
336set_location_assignment PIN_V10 -to DRAM_DQ[12]
337set_location_assignment PIN_V9 -to DRAM_DQ[13]
338set_location_assignment PIN_U10 -to DRAM_DQ[14]
339set_location_assignment PIN_T9 -to DRAM_DQ[15]
340set_location_assignment PIN_U12 -to DRAM_LDQM
341set_location_assignment PIN_AB6 -to DRAM_RAS_N
342set_location_assignment PIN_N8 -to DRAM_UDQM
343set_location_assignment PIN_AB5 -to DRAM_WE_N
344set_location_assignment PIN_N16 -to GPIO_0[0]
345set_location_assignment PIN_B16 -to GPIO_0[1]
346set_location_assignment PIN_M16 -to GPIO_0[2]
347set_location_assignment PIN_C16 -to GPIO_0[3]
348set_location_assignment PIN_D17 -to GPIO_0[4]
349set_location_assignment PIN_K20 -to GPIO_0[5]
350set_location_assignment PIN_K21 -to GPIO_0[6]
351set_location_assignment PIN_K22 -to GPIO_0[7]
352set_location_assignment PIN_M20 -to GPIO_0[8]
353set_location_assignment PIN_M21 -to GPIO_0[9]
354set_location_assignment PIN_N21 -to GPIO_0[10]
355set_location_assignment PIN_R22 -to GPIO_0[11]
356set_location_assignment PIN_R21 -to GPIO_0[12]
357set_location_assignment PIN_T22 -to GPIO_0[13]
358set_location_assignment PIN_N20 -to GPIO_0[14]
359set_location_assignment PIN_N19 -to GPIO_0[15]
360set_location_assignment PIN_M22 -to GPIO_0[16]
361set_location_assignment PIN_P19 -to GPIO_0[17]
362set_location_assignment PIN_L22 -to GPIO_0[18]
363set_location_assignment PIN_P17 -to GPIO_0[19]
364set_location_assignment PIN_P16 -to GPIO_0[20]
365set_location_assignment PIN_M18 -to GPIO_0[21]
366set_location_assignment PIN_L18 -to GPIO_0[22]
367set_location_assignment PIN_L17 -to GPIO_0[23]
368set_location_assignment PIN_L19 -to GPIO_0[24]
369set_location_assignment PIN_K17 -to GPIO_0[25]
370set_location_assignment PIN_K19 -to GPIO_0[26]
371set_location_assignment PIN_P18 -to GPIO_0[27]
372set_location_assignment PIN_R15 -to GPIO_0[28]
373set_location_assignment PIN_R17 -to GPIO_0[29]
374set_location_assignment PIN_R16 -to GPIO_0[30]
375set_location_assignment PIN_T20 -to GPIO_0[31]
376set_location_assignment PIN_T19 -to GPIO_0[32]
377set_location_assignment PIN_T18 -to GPIO_0[33]
378set_location_assignment PIN_T17 -to GPIO_0[34]
379set_location_assignment PIN_T15 -to GPIO_0[35]
380set_location_assignment PIN_H16 -to GPIO_1[0]
381set_location_assignment PIN_A12 -to GPIO_1[1]
382set_location_assignment PIN_H15 -to GPIO_1[2]
383set_location_assignment PIN_B12 -to GPIO_1[3]
384set_location_assignment PIN_A13 -to GPIO_1[4]
385set_location_assignment PIN_B13 -to GPIO_1[5]
386set_location_assignment PIN_C13 -to GPIO_1[6]
387set_location_assignment PIN_D13 -to GPIO_1[7]
388set_location_assignment PIN_G18 -to GPIO_1[8]
389set_location_assignment PIN_G17 -to GPIO_1[9]
390set_location_assignment PIN_H18 -to GPIO_1[10]
391set_location_assignment PIN_J18 -to GPIO_1[11]
392set_location_assignment PIN_J19 -to GPIO_1[12]
393set_location_assignment PIN_G11 -to GPIO_1[13]
394set_location_assignment PIN_H10 -to GPIO_1[14]
395set_location_assignment PIN_J11 -to GPIO_1[15]
396set_location_assignment PIN_H14 -to GPIO_1[16]
397set_location_assignment PIN_A15 -to GPIO_1[17]
398set_location_assignment PIN_J13 -to GPIO_1[18]
399set_location_assignment PIN_L8 -to GPIO_1[19]
400set_location_assignment PIN_A14 -to GPIO_1[20]
401set_location_assignment PIN_B15 -to GPIO_1[21]
402set_location_assignment PIN_C15 -to GPIO_1[22]
403set_location_assignment PIN_E14 -to GPIO_1[23]
404set_location_assignment PIN_E15 -to GPIO_1[24]
405set_location_assignment PIN_E16 -to GPIO_1[25]
406set_location_assignment PIN_F14 -to GPIO_1[26]
407set_location_assignment PIN_F15 -to GPIO_1[27]
408set_location_assignment PIN_F13 -to GPIO_1[28]
409set_location_assignment PIN_F12 -to GPIO_1[29]
410set_location_assignment PIN_G16 -to GPIO_1[30]
411set_location_assignment PIN_G15 -to GPIO_1[31]
412set_location_assignment PIN_G13 -to GPIO_1[32]
413set_location_assignment PIN_G12 -to GPIO_1[33]
414set_location_assignment PIN_J17 -to GPIO_1[34]
415set_location_assignment PIN_K16 -to GPIO_1[35]
416set_location_assignment PIN_U21 -to HEX0[0]
417set_location_assignment PIN_V21 -to HEX0[1]
418set_location_assignment PIN_W22 -to HEX0[2]
419set_location_assignment PIN_W21 -to HEX0[3]
420set_location_assignment PIN_Y22 -to HEX0[4]
421set_location_assignment PIN_Y21 -to HEX0[5]
422set_location_assignment PIN_AA22 -to HEX0[6]
423set_location_assignment PIN_AA20 -to HEX1[0]
424set_location_assignment PIN_AB20 -to HEX1[1]
425set_location_assignment PIN_AA19 -to HEX1[2]
426set_location_assignment PIN_AA18 -to HEX1[3]
427set_location_assignment PIN_AB18 -to HEX1[4]
428set_location_assignment PIN_AA17 -to HEX1[5]
429set_location_assignment PIN_U22 -to HEX1[6]
430set_location_assignment PIN_Y19 -to HEX2[0]
431set_location_assignment PIN_AB17 -to HEX2[1]
432set_location_assignment PIN_AA10 -to HEX2[2]
433set_location_assignment PIN_Y14 -to HEX2[3]
434set_location_assignment PIN_V14 -to HEX2[4]
435set_location_assignment PIN_AB22 -to HEX2[5]
436set_location_assignment PIN_AB21 -to HEX2[6]
437set_location_assignment PIN_Y16 -to HEX3[0]
438set_location_assignment PIN_W16 -to HEX3[1]
439set_location_assignment PIN_Y17 -to HEX3[2]
440set_location_assignment PIN_V16 -to HEX3[3]
441set_location_assignment PIN_U17 -to HEX3[4]
442set_location_assignment PIN_V18 -to HEX3[5]
443set_location_assignment PIN_V19 -to HEX3[6]
444set_location_assignment PIN_U20 -to HEX4[0]
445set_location_assignment PIN_Y20 -to HEX4[1]
446set_location_assignment PIN_V20 -to HEX4[2]
447set_location_assignment PIN_U16 -to HEX4[3]
448set_location_assignment PIN_U15 -to HEX4[4]
449set_location_assignment PIN_Y15 -to HEX4[5]
450set_location_assignment PIN_P9 -to HEX4[6]
451set_location_assignment PIN_N9 -to HEX5[0]
452set_location_assignment PIN_M8 -to HEX5[1]
453set_location_assignment PIN_T14 -to HEX5[2]
454set_location_assignment PIN_P14 -to HEX5[3]
455set_location_assignment PIN_C1 -to HEX5[4]
456set_location_assignment PIN_C2 -to HEX5[5]
457set_location_assignment PIN_W19 -to HEX5[6]
458set_location_assignment PIN_U7 -to KEY[0]
459set_location_assignment PIN_W9 -to KEY[1]
460set_location_assignment PIN_M7 -to KEY[2]
461set_location_assignment PIN_M6 -to KEY[3]
462set_location_assignment PIN_AA2 -to LEDR[0]
463set_location_assignment PIN_AA1 -to LEDR[1]
464set_location_assignment PIN_W2 -to LEDR[2]
465set_location_assignment PIN_Y3 -to LEDR[3]
466set_location_assignment PIN_N2 -to LEDR[4]
467set_location_assignment PIN_N1 -to LEDR[5]
468set_location_assignment PIN_U2 -to LEDR[6]
469set_location_assignment PIN_U1 -to LEDR[7]
470set_location_assignment PIN_L2 -to LEDR[8]
471set_location_assignment PIN_L1 -to LEDR[9]
472set_location_assignment PIN_D3 -to PS2_CLK
473set_location_assignment PIN_E2 -to PS2_CLK2
474set_location_assignment PIN_G2 -to PS2_DAT
475set_location_assignment PIN_G1 -to PS2_DAT2
476set_location_assignment PIN_P22 -to RESET_N
477set_location_assignment PIN_H11 -to SD_CLK
478set_location_assignment PIN_B11 -to SD_CMD
479set_location_assignment PIN_K9 -to SD_DATA[0]
480set_location_assignment PIN_D12 -to SD_DATA[1]
481set_location_assignment PIN_E12 -to SD_DATA[2]
482set_location_assignment PIN_C11 -to SD_DATA[3]
483set_location_assignment PIN_U13 -to SW[0]
484set_location_assignment PIN_V13 -to SW[1]
485set_location_assignment PIN_T13 -to SW[2]
486set_location_assignment PIN_T12 -to SW[3]
487set_location_assignment PIN_AA15 -to SW[4]
488set_location_assignment PIN_AB15 -to SW[5]
489set_location_assignment PIN_AA14 -to SW[6]
490set_location_assignment PIN_AA13 -to SW[7]
491set_location_assignment PIN_AB13 -to SW[8]
492set_location_assignment PIN_AB12 -to SW[9]
493set_location_assignment PIN_B6 -to VGA_B[0]
494set_location_assignment PIN_B7 -to VGA_B[1]
495set_location_assignment PIN_A8 -to VGA_B[2]
496set_location_assignment PIN_A7 -to VGA_B[3]
497set_location_assignment PIN_L7 -to VGA_G[0]
498set_location_assignment PIN_K7 -to VGA_G[1]
499set_location_assignment PIN_J7 -to VGA_G[2]
500set_location_assignment PIN_J8 -to VGA_G[3]
501set_location_assignment PIN_H8 -to VGA_HS
502set_location_assignment PIN_A9 -to VGA_R[0]
503set_location_assignment PIN_B10 -to VGA_R[1]
504set_location_assignment PIN_C9 -to VGA_R[2]
505set_location_assignment PIN_A5 -to VGA_R[3]
506set_location_assignment PIN_G8 -to VGA_VS
507
508#============================================================
509
510set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
511set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
512set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
513set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
514
515set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
516set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
517set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
518set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
519set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
520set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X1"
521set_global_assignment -name USE_CONFIGURATION_DEVICE ON
522set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE EPCS64
523set_global_assignment -name CRC_ERROR_OPEN_DRAIN ON
524set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
525set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
526set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
527set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
528set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
529set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
530set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
531
532set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top